Undergrad Projects

My undergrad projects may be classified into a) theoretical research and b) hardware design work.

Theoretical research projects:

We focussed on problems related to gradient coding, distributed computing and some problems in heavy-hitter estimation.

• Query Complexity of Heavy-Hitter distribution (Aug ‘19 - Jan ‘20)
  Guide : Prof. Nikhil Karamchandani, Department of Electrical Engineering, IIT Bombay
  
  • Objective: We investigated the problem of identifying the subset of elements in the support of an underlying distribution $\mathcal{P}$ with probabilities exceeding a given threshold $\gamma$, using two distinct query models under a fixed confidence. In the first model, a query $t$ provides the realization of the random variable $X_t$. In the second model, a query $(i,j)$ reveals whether $X_i$ is equal to $X_j$. We provide upper and lower bounds under both the query models.
  • Authors: Sahasrajit Sarmasarkar, Kota Srinivas Reddy and Nikhil Karamchandani
  • Paper presented at ISIT, 2021
• Optimal Moments on Redundancies in Noisy Parallel Computing Setup| Paper (Jan ‘20 - Jan ‘21)
  Guide : Prof. Harish Pillai, Deaprtment of Electrical Engineering, IIT Bombay
  
  • Objective: We consider a setup where the master assigns $n$ jobs(tasks) to $c$ servers with $k$ distinct jobs in each server with each job being present in exactly $r$ servers. The goal is to ensure that the master receives most of jobs when each server is equally likely to straggle and we show balanced incomplete block designs and repitition coding based assignments attain the least and the largest variance respectively.
  • Authors: Sahasrajit Sarmasarkar and Harish Pillai
• Straggler mitigation under gradient coding (Sep ‘20 - Sep ‘21)
  Guide: Prof. Lalitha Vadlamani, IIIT Hyderabad, Prof. Nikhil Karamchandani, IIT Bombay
  
  • Objective: We consider the problem of gradient descent where the master does not compute the sum of gradients across all $n$ data points but sum of any $\alpha$ fraction of them suffices. We study this problem as a distributed gradient coding problem where each child server has access to some gradients and it sends their linear combination to the server and we showed the optimality of some of our schemes. Further, we show empirically that such schemes may indeed converge faster than typical baselines.
  • Authors: Sahasrajit Sarmasarkar, Lalitha Vadlamani and Nikhil Karamchandani
  • Paper presented at ISIT, 2021 and Extended version accepted at IEEE-TCOM.

Digital System Design Work:

• Hardware Accelerator for Graphics Computation| [Report] (Oct ‘19 - Nov ‘19)
  Guide: Prof. Madhav Desai, EE, IIT-B
  Introduction: The goal in this project was to build an efficient hardware accelerator which exploits parallelism and we implemented a pipelined design for convolving a kernel with an image stored in shared memory. Parallelized the operation using multiple engines which can fetch the image through pipes and perform convolution to reduce computation time and utilize the entire memory bandwidth.

• Superscaler and Pipelined Processor Design| [Github repository] (Oct ‘18 - May ‘19)
  Guide: Prof. Virendra Singh, EE, IIT-B
  Introduction: Designed a pipelined RISC processor that employed hazard-mitigation, operand-forwarding techniques and a superscaler processor consisting of two way fetch supported by specialised execution engines, reorder buffer, register renaming and reservation station to extract instruction level parallelism.

• IIT Bombay Racing (Electric Subsystem) (Academic year ‘17-‘19)
  Worked as a junior design engineer and a design enginner in a cross functional team of 60+ students from 7 engineering disciplines which designs and fabricates an electric race car for Formula Student competition held annually at Silverstone, UK.
  Tasks accomplished:

  • Lead the designed of the harness of the whole car taking into account the electric requirements of each part. Further, we designed and tested the CAN (Controlled Area Network) node using CAN enabled micro-controller atmega-16M1 in embedded C using interrupts.
    
  • Developed codes using interrupts in ECU (embedded C programming) for reading data from CAN bus and sending control commands to BLDC motors.